Scholars

Jimenez, Daniel

Professor

Positions:

Professor - Term Appointment, Computer Science and Engineering, College of Engineering

Research Areas:

Computer science

UN Sustainable Development Goals:

Single Page Bio

Profile Summary

djimenez@tamu.edu

1 979 845 1858

Co-author Network

Map of Science

Co-investigator Network

Websites

Personal Webpage

UN Sustainable Development Goals:

Research Areas:

Computer science

overview

I'm interested in anything related to making computation go faster. My focus is on microarchitecture and the interaction between the compiler and the microarchitecture. I've been doing a lot of work in branch prediction and more recently caches. I'm known for inventing the perceptron branch predictor as well as for other research.

education and training

Ph.D. in Computer Sciences, The University of Texas at Austin - (Austin, Texas, United States) 2002
M.S. in Computer Science, The University of Texas at San Antonio - (San Antonio, Texas, United States) 1994
B.S. in Computer Science and Systems Design, The University of Texas at San Antonio - (San Antonio, Texas, United States) 1992

selected publications

Academic Articles19

Jimenez, D. (2021). Top Picks From the 2020 Computer Architecture Conferences. IEEE Micro. 41(3), 6-9.
AlBarakat, L. M., Gratz, P. V., & Jimenez, D. A. (2018). MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors. IEEE Computer Architecture Letters. 17(2), 175-178.
Kim, J., Teran, E., Gratz, P. V., Jimnez, D. A., Pugsley, S. H., & Wilkerson, C. (2017). Kill the Program Counter. ACM SIGPLAN Notices. 52(4), 737-749.
Jimnez, D., Labate, D., & Papadakis, M. (2016). Directional analysis of 3D tubular structures via isotropic well-localized atoms. Applied and Computational Harmonic Analysis. 40(3), 588-599.
Liu, Q., Moreto, M., Abella, J., Cazorla, F. J., Jimenez, D. A., & Valero, M. (2016). Sensible Energy Accounting with Abstract Metering for Multicore Systems. ACM Transactions on Architecture and Code Optimization. 12(4), 1-26.

SDG 7

Conference Papers58

Vavouliotis, G., Alvarez, L., Grot, B., Jiménez, D., & Casas, M. (2021). Morrigan: A Composite Instruction TLB Prefetcher. MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture. 1138-1153.
Vavouliotis, G., Alvarez, L., Karakostas, V., Nikas, K., Koziris, N., Jimenez, D. A., & Casas, M. (2021). Exploiting Page Table Locality for Agile TLB Prefetching. 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA). 00, 85-98.
Jamet, A. V., Alvarez, L., Jimenez, D. A., & Casas, M. (2020). Characterizing the impact of last-level cache replacement policies on big-data workloads. 2020 IEEE International Symposium on Workload Characterization (IISWC), 2020 IEEE International Symposium on Workload Characterization (IISWC). 00, 134-144.
Grayson, B., Rupley, J., Zuraski, G. Z., Quinnell, E., Jimenez, D. A., Nakra, T., ... Ghiya, A. (2020). Evolution of the Samsung Exynos CPU Microarchitecture. 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA). 40-51.
Backes, L., & Jiménez, D. A. (2019). The impact of cache inclusion policies on cache management techniques. Proceedings of the International Symposium on Memory Systems, MEMSYS '19: The International Symposium on Memory Systems. 428-438.