Scholars

Jimenez, Daniel

Professor

Positions:

Professor - Term Appointment, Computer Science and Engineering, College of Engineering

Research Areas:

Computer science

UN Sustainable Development Goals:

Single Page Bio

Profile Summary

djimenez@tamu.edu

1 979 845 1858

Co-author Network

Map of Science

Co-investigator Network

Websites

Personal Webpage

UN Sustainable Development Goals:

Research Areas:

Computer science

overview

I'm interested in anything related to making computation go faster. My focus is on microarchitecture and the interaction between the compiler and the microarchitecture. I've been doing a lot of work in branch prediction and more recently caches. I'm known for inventing the perceptron branch predictor as well as for other research.

education and training

Ph.D. in Computer Sciences, The University of Texas at Austin - (Austin, Texas, United States) 2002
M.S. in Computer Science, The University of Texas at San Antonio - (San Antonio, Texas, United States) 1994
B.S. in Computer Science and Systems Design, The University of Texas at San Antonio - (San Antonio, Texas, United States) 1992

selected publications

Academic Articles34

Jimenez, D. A. (2021). Top Picks From the 2020 Computer Architecture Conferences. IEEE MICRO. 41(3), 6-9.
Chen, L., Penney, D., & Jimnez, D. (2020). AI for Computer Architecture. Synthesis Lectures on Computer Architecture. 15(5), 1-142.
AlBarakat, L. M., Gratz, P. V., & Jimenez, D. A. (2018). MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors. IEEE COMPUTER ARCHITECTURE LETTERS. 17(2), 175-178.
Kim, J., Teran, E., Gratz, P. V., Jimenez, D. A., Pugsley, S. H., & Wilkerson, C. (2017). Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy. TWENTY-SECOND INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS (ASPLOS XXII). 52(4), 737-749.
Liu, Q., Moreto, M., Abella, J., Cazorla, F. J., Jimenez, D. A., & Valero, M. (2016). Sensible Energy Accounting with Abstract Metering for Multicore Systems. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION. 12(4), 1-26.

SDG 7

Conference Papers79

Vavouliotis, G., Chacon, G., Alvarez, L., Gratz, P. V., Jimenez, D. A., & Casas, M. (2022). Page Size Aware Cache Prefetching. IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO). 00, 956-974.
Khan, T. A., Ugur, M., Nathellat, K., Sunwoot, D., Litz, H., Jimenez, D. A., & Kasikci, B. (2022). Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications. 2022 55TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO), 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO). 00, 19-34.
Song, S., Khan, T. A., Shahri, S. M., Sriraman, A., Soundararajan, N. K., Subramoney, S., ... Kasikci, B. (2022). Thermometer: Profile-Guided BTB Replacement for Data Center Applications. PROCEEDINGS OF THE 2022 THE 49TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA '22), Proceedings of the 49th Annual International Symposium on Computer Architecture. 742-756.
Vavouliotis, G., Alvarez, L., Grot, B., Jimnez, D., & Casas, M. (2021). Morrigan: A Composite Instruction TLB Prefetcher. MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture. 1138-1153.
Vavouliotis, G., Alvarez, L., Karakostas, V., Nikas, K., Koziris, N., Jimenez, D. A., & Casas, M. (2021). Exploiting Page Table Locality for Agile TLB Prefetching. 2021 ACM/IEEE 48TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2021), 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA). 00, 85-98.