Jimenez, Daniel
individual record
Professor
Positions:
- Professor - Term Appointment, Computer Science and Engineering, College of Engineering
overview
I'm interested in anything related to making computation go faster. My focus is on microarchitecture and the interaction between the compiler and the microarchitecture. I've been doing a lot of work in branch prediction and more recently caches. I'm known for inventing the perceptron branch predictor as well as for other research.
education and training
- Ph.D. in Computer Sciences, The University of Texas at Austin - (Austin, Texas, United States) 2002
- M.S. in Computer Science, The University of Texas at San Antonio - (San Antonio, Texas, United States) 1994
- B.S. in Computer Science and Systems Design, The University of Texas at San Antonio - (San Antonio, Texas, United States) 1992
selected publications
Academic Articles34
- Jimenez, D. A. (2021). Top Picks From the 2020 Computer Architecture Conferences. IEEE MICRO. 41(3), 6-9.
- Chen, L., Penney, D., & Jimnez, D. (2020). AI for Computer Architecture. Synthesis Lectures on Computer Architecture. 15(5), 1-142.
- AlBarakat, L. M., Gratz, P. V., & Jimenez, D. A. (2018). MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors. IEEE COMPUTER ARCHITECTURE LETTERS. 17(2), 175-178.
- Kim, J., Teran, E., Gratz, P. V., Jimenez, D. A., Pugsley, S. H., & Wilkerson, C. (2017). Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy. TWENTY-SECOND INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS (ASPLOS XXII). 52(4), 737-749.
- Liu, Q., Moreto, M., Abella, J., Cazorla, F. J., Jimenez, D. A., & Valero, M. (2016). Sensible Energy Accounting with Abstract Metering for Multicore Systems. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION. 12(4), 1-26.
Conference Papers79
- Vavouliotis, G., Chacon, G., Alvarez, L., Gratz, P. V., Jimenez, D. A., & Casas, M. (2022). Page Size Aware Cache Prefetching. IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO). 00, 956-974.
- Khan, T. A., Ugur, M., Nathellat, K., Sunwoot, D., Litz, H., Jimenez, D. A., & Kasikci, B. (2022). Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications. 2022 55TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO), 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO). 00, 19-34.
- Song, S., Khan, T. A., Shahri, S. M., Sriraman, A., Soundararajan, N. K., Subramoney, S., ... Kasikci, B. (2022). Thermometer: Profile-Guided BTB Replacement for Data Center Applications. PROCEEDINGS OF THE 2022 THE 49TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA '22), Proceedings of the 49th Annual International Symposium on Computer Architecture. 742-756.
- Vavouliotis, G., Alvarez, L., Grot, B., Jimnez, D., & Casas, M. (2021). Morrigan: A Composite Instruction TLB Prefetcher. MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture. 1138-1153.
- Vavouliotis, G., Alvarez, L., Karakostas, V., Nikas, K., Koziris, N., Jimenez, D. A., & Casas, M. (2021). Exploiting Page Table Locality for Agile TLB Prefetching. 2021 ACM/IEEE 48TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2021), 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA). 00, 85-98.
Repository Documents / Preprints1
- Gober, N., Chacon, G., Wang, L., Gratz, P. V., Jimenez, D. A., Teran, E., Pugsley, S., & Kim, J. (2022). The Championship Simulator: Architectural Simulation for Education and Competition.
in the news
- Daniel A. Jiménez Selected to Receive the IEEE Computer Society 2021 B. Ramakrishna Rau Award IEEE Computer Society October 4, 2021
- Jiménez inducted into International Symposium on Computer Architecture Hall of Fame TAMU Engineering August 11, 2021
- Jiménez to help determine top computer architecture papers for publication TAMU Engineering February 12, 2021
- Jiménez elevated to Institute of Electrical and Electronics Engineers Fellow TAMU Engineering January 5, 2021
- Jiménez receives High-Performance Computer Architecture Test of Time Award TAMU Engineering February 19, 2019
researcher on
Principal Investigator4
- EAGER: Deep Learning for Microarchitectural Prediction awarded by National Science Foundation 2016 - 2019
- SHF:CSR:Small:Improving Processor Efficiency with Prediction awarded by National Science Foundation 2013 - 2017
awards and honors
recent teaching activities
- CSCE312 Computer Organization Instructor
- CSCE481 Seminar Instructor
- CSCE605 Compiler Design Instructor
- CSCE614 Computer Architecture Instructor
- CSCE684 Professional Internship Instructor
chaired theses and dissertations
- Teran, Elvira (2017-07). Principled Approaches to Last-Level Cache Management. (Doctoral Dissertation)
- Backes Drault, Luna B (2017-08). Evaluation of Cache Inclusion Policies in Cache Management. (Master's Thesis)
Email
djimenez@tamu.edu
First Name
Daniel
Last Name
Jimenez
mailing address
Texas A&M University; Computer Science & Engineering; 3112 TAMU
College Station, TX 77843-3112
USA