Scholars

Hu, Jiang

Professor

Positions:

Faculty Affiliate, Energy Institute, Texas A&M Engineering Experiment Station (TEES), Division of Research
Professor, Electrical and Computer Engineering, College of Engineering

UN Sustainable Development Goals:

Single Page Bio

Profile Summary

jianghu@tamu.edu

1 979 847 8768

Co-author Network

Map of Science

Co-investigator Network

Websites

CESG Website

UN Sustainable Development Goals:

overview

Current research: optimization for energy-efficient VLSI circuits, on-chip communication fabrics, dynamic power management, adaptive circuit design, interactions between physical design and system-level design, heuristics for large scale combinatorial optimization.

education and training

Ph.D. in Electrical Engineering, University of Minnesota - (Minneapolis, Minnesota, United States) 2001
M.S. in Physics, Zhejiang University - (Hangzhou, Zhejiang, China) 1997
B.S. in Optical Engineering, Zhejiang University - (Hangzhou, Zhejiang, China) 1990

selected publications

Academic Articles61

Zhuo, C., Luo, S., Gan, H., Hu, J., & Shi, Z. (2020). Noise-Aware DVFS for Efficient Transitions on Battery-Powered IoT Devices. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39(7), 1498-1510.

SDG 7
Won, J., Gratz, P. V., Shakkottai, S., & Hu, J. (2016). Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory. ACM Transactions on Design Automation of Electronic Systems. 21(4), 1-25.

SDG 7
Silva-Martinez, J., Karlayan, A., Hu, J., & Krishnaswamy, H. (2016). Special Issue on the 57th International Midwest Symposium on Circuits and Systems. Analog Integrated Circuits and Signal Processing. 88(2), 181-183.
Davoodi, A., Hu, J., Ozdal, M., & Sze, C. (2015). Guest Editorial: Special Section on Physical Design Techniques for Advanced Technology Nodes. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 34(4), 501-501.
Won, J., Ryu, H., Delbruck, T., Lee, J. H., & Hu, J. (2015). Proximity Sensing Based on a Dynamic Vision Sensor for Mobile Devices. IEEE Transactions on Industrial Electronics. 62(1), 536-544.

Chapters5

Liu, Y., & Hu, J. (2011). GPU-Based Parallel Computing for Fast Circuit Optimization. GPU Computing Gems Emerald Edition. 365-378. Elsevier.
Hu, J., Li, Z., & Hu, S. (2008). Buffer Insertion Basics. Handbook of Algorithms for Physical Design Automation. Auerbach Publications.
Hu, J., & Sze, C. (2008). Buffering in the Layout Environment. Handbook of Algorithms for Physical Design Automation. Auerbach Publications.
Hu, J., Robins, G., & Sze, C. (2008). Timing-Driven Interconnect Synthesis. Handbook of Algorithms for Physical Design Automation. Auerbach Publications.
Hu, J., & Sapatnekar, S. S. (2001). Non-Hanan Optimization for Global VLSI Interconnect. Lu, B., Du, D., & Sapatnekar, S. S. (Eds.), Network Theory and Applications. 89-123. Springer US.

Conference Papers109

Li, C., Sapatnekar, S. S., & Hu, J. (2019). Fast Mapping-Based High-Level Synthesis of Pipelined Circuits. 20th International Symposium on Quality Electronic Design (ISQED), 2019 20th International Symposium on Quality Electronic Design (ISQED). 00, 33-38.
Xie, Z., Huang, Y., Fang, G., Ren, H., Fang, S., Chen, Y., & Corporation, N. (2019). RouteNet. Proceedings of the International Conference on Computer-Aided Design, ICCAD '18: IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN. 1-8.
Feng, L., Kudva, P., Da Silva, D., & Hu, J. (2018). Exploring Serverless Computing for Neural Network Training. 2018 IEEE 11th International Conference on Cloud Computing (CLOUD), 2018 IEEE 11th International Conference on Cloud Computing (CLOUD). 2018-July, 334-341.
Huang, L., Hou, I., Sapatnekar, S. S., & Hu, J. (2018). Graceful Degradation of Low-Criticality Tasks in Multiprocessor Dual-Criticality Systems. Proceedings of the 26th International Conference on Real-Time Networks and Systems, RTNS '18: 26th International Conference on Real-Time Networks and Systems. 159-169.
Jayasankaran, N. G., Borbon, A. S., Sanchez-Sinencio, E., Hu, J., & Rajendran, J. (2018). Towards provably-secure analog and mixed-signal locking against overproduction. Proceedings of the International Conference on Computer-Aided Design, ICCAD '18: IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN. 1-8.