Walker, Duncan individual record
Professor - Term Appointment
Positions:
selected publications
Academic Articles23
Chapters4
  • Walker, D. M., & Hsiao, M. S. (2008). Chapter 6 Delay Testing. System-on-Chip Test Architectures. (pp. 263-306).
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  • Huang, J. L., Li, J., & Walker, D. M. (2006). Logic and fault simulation. VLSI Test Principles and Architectures. (pp. 105-159). Elsevier.
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  • Huang, J., Li, J., & Walker, D. M. (2006). Chapter 3 Logic and Fault Simulation. VLSI Test Principles and Architectures. (pp. 105-159).
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  • Sakallah, K. A., Walker, D. M., & Nassif, S. R. (2003). Timing, Test and Manufacturing Overview. The Best of ICCAD. (pp. 551-562). Springer US.
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Conference Papers78
chaired theses and dissertations
Email
d-walker@tamu.edu
First Name
Duncan
Last Name
Walker
mailing address
Texas A&M University; Computer Science & Engineering; 3112 TAMU
College Station, TX 77843-3112
USA