Walker, Duncan individual record
Professor - Term Appointment
Positions:
selected publications
Academic Articles22
Chapters1
  • Huang, J. L., Li, J., & Walker, D. M. (2006). Logic and fault simulation. VLSI Test Principles and Architectures. (pp. 105-159). Elsevier.
    doi badge
Conference Papers72
  • Chakraborty, S., & Walker, D. (2015). At-Speed Path Delay Test. 39-42.
    doi badge
  • Zhang, T., & Walker, D. (2015). Impact of test compression on power supply noise control. 161-166.
    doi badge
  • Chakraborty, A., & Walker, D. (2015). Optimizing VMIN of ROM arrays without loss of noise margin. 20-22-May-2015, 397-402.
    doi badge
  • Gao, Y., Zhang, T., Chakraborty, S., Walker, D., & IEEE, .. (2014). Delay Test of Embedded Memories. 65-68.
    doi badge
  • Zhang, T., Walker, D., & IEEE, .. (2014). Improved Power Supply Noise Control for Pseudo Functional Test. Proceedings of the IEEE VLSI Test Symposium.
    doi badge
chaired theses and dissertations
Email
d-walker@tamu.edu
First Name
Duncan
Last Name
Walker
mailing address
Texas A&M University; Computer Science & Engineering; 3112 TAMU
College Station, TX 77843-3112
USA