overview

My research areas include Computer-aided design of Very Large Scale Integration (VLSI) ICs, including logic and physical design automation.

education and training
selected publications
Academic Articles36
  • Fairouz, A. A., Abusultan, M., Fedorov, V. V., & Khatri, S. P. (2021). Hardware Acceleration of Hash Operations in Modern Microprocessors. IEEE Transactions on Computers. 70(9), 1412-1426.
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  • Kawam, A. A., Khatri, S., & Datta, A. (2018). A GPU-CPU heterogeneous algorithm for NGS read alignment. International Journal of Computational Biology and Drug Design. 11(1/2), 52-52.
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  • Al Kawam, A., Khatri, S., & Datta, A. (2017). A Survey of Software and Hardware Approaches to Performing Read Alignment in Next Generation Sequencing.. IEEE/ACM Trans Comput Biol Bioinform. 14(6), 1202-1213.
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  • Shah, M. D., Marianno, C., Khatri, S. P., & Fisher, B. D. (2017). A Neutron Detector Using Integrated Circuits. Journal of Modern and Applied Physics. 1(1), 3-7.
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  • Fedorov, V. V., Abusultan, M., & Khatri, S. P. (2016). FTCAM: An Area-Efficient Flash-Based Ternary CAM Design. IEEE Transactions on Computers. 65(8), 2652-2658.
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Books8
  • Mandal, A., Khatri, S. P., & Mahapatra, R. (2014). Source-Synchronous Networks-On-Chip. Springer New York.
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  • Lin, P., & Khatri, S. P. (2014). Logic Synthesis for Genetic Diseases. Springer New York.
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  • Khatri, S. P., & Gulati, K. (2011). Advanced Techniques in Logic Synthesis, Optimizations and Applications. Springer New York.
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  • Khatri, S. P., & Gulati, K. (2011). Introduction. Springer New York.
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  • Garg, R., & Khatri, S. P. (2010). Analysis and Design of Resilient VLSI Circuits. Springer US.
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Chapters4
  • Khatri, S. P., Shenoy, N. V., Giomi, J. C., & Khouja, A. (2017). Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology. Lavagno, L., Markov, I. L., Martin, G., & Scheffer, L. K. (Eds.), Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology. 27-56. CRC Press.
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  • Cobb, J. L., Gulati, K., & Khatri, S. P. (2011). A Robust Window-Based Multi-node Minimization Technique Using Boolean Relations. Advanced Techniques in Logic Synthesis, Optimizations and Applications. 309-334. Springer New York.
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  • Bollapalli, K. C., Khatri, S. P., & Kish, L. B. (2011). Digital Logic Using Non-DC Signals. Gulati, K. (Eds.), Advanced Techniques in Logic Synthesis, Optimizations and Applications. 383-400. Springer New York.
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  • Khatri, S. P., & Shenoy, N. V. (2006). Logic synthesis. EDA for IC Implementation, Circuit Design, and Process Technology. 2-1-2-26.
Conference Papers166
  • Bharathi, K., Hu, J., & Khatri, S. P. (2020). Scaled Population Subtraction for Approximate Computing. 2020 IEEE 38th International Conference on Computer Design (ICCD), 2020 IEEE 38th International Conference on Computer Design (ICCD). 00, 348-355.
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  • Zhou, H. e., Khatri, S. P., Hu, J., & Liu, F. (2019). A Memory-Efficient Markov Decision Process Computation Framework Using BDD-based Sampling Representation. Proceedings of the 56th Annual Design Automation Conference 2019, DAC '19: The 56th Annual Design Automation Conference 2019. 1-6.
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  • Loyka, K., Zhou, H. e., & Khatri, S. P. (2018). A Homomorphic Encryption Scheme Based on Affine Transforms. Proceedings of the 2018 on Great Lakes Symposium on VLSI, GLSVLSI '18: Great Lakes Symposium on VLSI 2018. 51-56.
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  • Bharathi, K., Kumar, H., Fairouz, A., Al Kawam, A., & Khatri, S. P. (2018). A Plain-Text Incremental Compression (PIC) Technique with Fast Lookup Ability. 2018 IEEE 36th International Conference on Computer Design (ICCD), 2018 IEEE 36th International Conference on Computer Design (ICCD). 389-396.
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  • Fairouz, A., Abusultan, M., Elshennawy, A., & Khatri, S. P. (2018). Comparing Leakage Reduction Techniques for an Asynchronous Network-on-Chip Router. Journal of Low Power Electronics. 14(3), 414-427.
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chaired theses and dissertations
Email
sunilkhatri@tamu.edu
First Name
Sunil
Last Name
Khatri
mailing address
Texas A&M University; Electrical Engineering; 3128 TAMU
College Station, TX 77843-3259
USA